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| W91320N SERIES TONE/PULSE DIALER WITH HANDFREE LOCK AND HOLD FUNCTIONS GENERAL DESCRIPTION The W91320N series are Si-gate CMOS ICs that provide the necessary signals for tone or pulse dialing. The W91320N series provide one-key redial, handfree dialing, hold, redial, and lock functions. FEATURES * * DTMF/pulse switchable dialer 32-digit redial memory (*/T) keypad for long distance call operation 5 x 5 keyboard * Pulse-to-tone * Uses * * * * * * * Easy operation with redial, flash, pause, and */T keypads Pause, pulse-to-tone (*/T) can be stored as a digit in memory 0 or 9 dialing inhibition pin for PABX system or long distance dialing lock out Off-hook delay 300 mS in lock mode ( DP will keep low for 300 mS while off hook) First key-in delay 300 mS output in lock mode Dialing rate (10, 20 ppS ) selected by bonding option Minimum tone output duration: 93 msec. intertone pause: 93 msec. Flash break time (73, 100, 300, 600 msec.) selectable by keypad, and the pause time is 1.0 sec. power-on reset Uses 3.579545 MHz crystal or ceramic resonator * Minimum * * On-chip * * Packaged in 18, 20, or 22-pin plastic DIP * The different dialers in the W91320N series are shown in the following table: TYPE NO. W91320N W91321N W91320AN W91321AN W91320LN W91320ALN REPLACEMENT TYPE NO. W91320 W91321 W91320A W91321A W91322L W91322AL PULSE (ppS) 10 20 10 20 10 10 FLASH (mS) 600/100/300/73 600/100/300/73 600/100/300/73 600/100/300/73 600/100/300/73 600/100/300/73 M/B Pin Pin Pin Pin Pin Pin HANDFREE DIALING Yes Yes Yes LOCK Yes Yes PACKAGE (PINS) 18 18 20 20 20 22 -1- Publication Release Date: May 1997 Revision A2 W91320N SERIES PIN CONFIGURATIONS C1 C1 C2 C3 C4 H/P MUTE VSS XT XT T/P MUTE 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 R4 R3 R2 R1 VDD MODE DTMF XT DP/C5 HKS T/P MUTE HFI C2 C3 C4 H/P MUTE VSS XT 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 R4 R3 R2 R1 VDD MODE DTMF DP/C5 HKS HFO W91320N/W91321N W91320AN/W91321AN C1 C1 C2 C3 C4 LOCK H/P MUTE VSS XT XT T/P MUTE 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 R4 R3 R2 R1 VDD NC MODE DTMF DP/C5 HKS C2 C3 C4 LOCK H/P MUTE VSS XT XT T/P MUTE HFI 1 2 3 4 5 6 7 8 9 10 11 22 21 20 19 18 17 16 15 14 13 12 R4 R3 R2 R1 VDD NC MODE DTMF DP/C5 HKS HFO W91320LN W91320ALN -2- W91320N SERIES PIN DESCRIPTION SYMBOL ColumnRow Inputs 18-PIN 1-4 & 15-18 20-PIN 1-4 & 17-20 22-PIN 1-4 & 19-22 I I/O FUNCTION The keyboard inputs may be used with either the standard 5 x 5 keyboard or the inexpensive single contact (Form A) keyboard. Electronic input from a C can also be used. A valid key-in is defined as a single row being connected to a single column XT, XT 7, 8 7, 8 (8, 9, W91320LN only) 8, 9 I, O A built-in inverter provides oscillation with an inexpensive 3.579545 MHz crystal or ceramic resonator. The T/P MUTE is a conventional CMOS N-channel open drain output. The output transistor is switched on during dialing sequence, one-key redial break and flash break time. Otherwise, it is switched off. T/P MUTE 9 9 (10, W91320LN only) 10 O MODE 13 15 (14, W91320LN only) 16 I Pulling mode pin to VSS places the dialer in tone mode. Pulling mode pin to VDD places the dialer in pulse mode. (10 ppS; 20 ppS for W91321N/321AN M/B = 40:60) Floating mode pin places the dialer in pulse mode. (10 ppS; 20 ppS for W91321N/321AN M/B = 33.3:66.7) HKS 10 12 (11, W91320LN only) 13 I Hook switch input. HKS = VDD: On-hook state. Chip in sleeping mode, no operation. HKS = VSS: Off-hook state. Chip is enable for normal operation. HKS pin is pulled to VDD by internal resistor. -3- Publication Release Date: May 1997 Revision A2 W91320N SERIES Pin Description, continued SYMBOL DP / C5 18-PIN 11 20-PIN 13 (12, W91320LN only) 22-PIN 14 I/O O FUNCTION N-channel open drain dialing pulse output. Flash key will cause DP to be active in either tone mode or pulse mode. The timing diagram for pulse mode is shown in Figure 1(a, b, c, d). VDD, VSS 14, 6 16, 6 (16, 7 W91320LN only) 18, 7 I Power input pins. H/P MUTE 5 5 (6, W91320LN only) 6 O The H/P MUTE is a conventional inverter output. During pulse dialing, flash break, one-key redial break, and hold period, this output is active high; otherwise, it remains in low state. No connection. NC - 15 (W91320LN only) 17 - DTMF 12 14 (13, W91320LN only) 15 O In pulse mode, this pin remains in low state at all time. In the tone mode, it will output a dual or single tone. Detailed timing diagram for tone mode is shown in Figure 2(a, b, c, d). Output Frequency Specified R1 R2 R3 R4 C1 C2 C3 697 770 852 941 1209 1336 1477 Actual 699 766 848 948 1216 1332 1472 Error % +0.28 -0.52 -0.47 +0.74 +0.57 -0.30 -0.34 -4- W91320N SERIES Pin Description, continued SYMBOL HFI, HFO 18-PIN - 20-PIN 10, 11 (W91320AN/ 321AN) 22-PIN 11, 12 I/O I, O FUNCTION Handfree control pins. The handfree control state is toggled on by a low pulse on the HFI input pin. The status of the handfree control state is described in the following table: CURRENT STATE Hook SW. HFO Low On Hook Off Hook On Hook Off Hook Off Hook Low High High High Input HFI HFI HFI Off Hook On Hook On Hook NEXT STATE HFO High Low Low Low Low High Dialing Yes No Yes Yes No Yes HFI pin is pulled to VDD by internal resistor. Detailed timing diagrams are shown in Figure 3(a, b, c). LOCK 5 (6, W91320LN only) 5 I The function of this terminal is to prevent "0" dialing and "9" dialing under PABX system long distance call control. When the first key input after reset is 0 or 9, all key inputs, including the 0 or 9 key, become invalid and the chip generates no output. The telephone is reinitialized by a reset. LOCK PIN Floating VDD VSS FUNCTION Normal dialing mode "0," "9" dialing inhibited "0" dialing inhibited -5- Publication Release Date: May 1997 Revision A2 W91320N SERIES BLOCK DIAGRAM XT XT SYSTEM CLOCK GENERATOR HKS HFI LOCK ROW (R1 to R4, Vx) KEYBOARD INTERFACE H/P MUTE COLUMN (C1 to C4) LOCATION LATCH RAM PULSE CONTROL LOGIC T/P MUTE READ/ WRITE COUNTER CONTROL LOGIC MODE DP/C5 HFO DTMF D/A CONVERTER ROW & COLUMN PROGRAMMABLE COUNTER DATA LATCH & DECODER FUNCTIONAL DESCRIPTION Keyboard Operation C1 1 4 7 /T R/P2 * * * * * C2 2 5 8 0 R C3 3 6 9 # F3 C4 F1 F2 R/P1 F4 DP / C5 R1 R2 H R R3 R4 VX R/P1, R/P2: Redial and pause function key, P1 is 3.6 sec. and P2 is 2.0 sec. /T: in tone mode and PT in pulse mode F1, ..., F4: Flash keys, the flash break time of F1 = 600 mS, F2 = 100 mS, F3 = 300 mS, F4 = 73 mS H: Hold function key R: One-key redial function Notes: D1, ..., Dn, D1', ..., Dn': 0, ..., 9, */T, # R/P: R/P1 or R/P2. Fn: F1, ..., F4 -6- W91320N SERIES Normal Dialing OFF HOOK (or ON HOOK & HFI o ), D1 , D2 , ..., Dn 1. D1, D2, ..., Dn will be dialed out. 2. Dialing length is unlimited, but redial is inhibited if length oversteps 32 digits in normal dialing. Redialing 1. OFF HOOK Come (or ON HOOK , & HFI o (or ), D1 , & D2 , ..., Dn ), , Busy, R/P ON HOOK OFF HOOK ON HOOK HFI o a. The redial memory content will be dialed out. b. The R/P key can execute the redial function only as the first key-in after off-hook; otherwise, it executes pause function. c. If redialing length oversteps 32 digits, the redialing function will be inhibited. 2. OFF HOOK (or ON HOOK & HFI o ), D1 , D2 , ..., Dn , Busy, R a. The one-key redialing function timing diagram is shown in Figure 4. b. If the dialing of D1 to Dn is finished, pressing the R key will cause the pulse output pin to go low for 2.2 seconds break time and 0.6 seconds pause time will automatically be added. c. If the pulses of the dialed digits d. The redial function by e. The R D1 to Dn have not finished, R will be ignored. R key has no break time (2.2 sec.) if it is the first key in after off-hook. R/P1 or R/P2 key, key uses the same redial buffer as the redial function by and it is actived during normal dialing or repertory dialing. Access Pause OFF HOOK (or ON HOOK & HFI o ), D1 , D2 , R/P , D3 , ..., Dn 1. The pause function is executed in normal dialing, redial dialing, or memory dialing. 2. The pause duration of 2.0 or 3.6 seconds per pause is selected by keypad, but only one pause time can be stored in memory. 3. The detailed timing diagram for the pause function is shown in Figure 5. Pulse-to-tone (*/T) OFF HOOK D2' , ..., (or Dn' ON HOOK & HFI o ), D1 , D2 , ..., Dn , */T , D1' , -7- Publication Release Date: May 1997 Revision A2 W91320N SERIES 1. If the mode switch is set to pulse mode, then the output signal will be: D1, D2, ..., Dn, Pause (2.0 sec. or 3.6 sec.), D1', D2', ..., Dn' (Pulse) (Tone ) 2. If the mode switch is set to tone mode, then the output signal will be: D1, D2, ..., Dn, *, D1', D2', ..., Dn' (Tone) (Tone) 3. The dialer remains in tone mode when the digits have been dialed out and can be reset to pulse mode only by going on-hook. 4. The pulse-to-tone function timing diagram is shown in Figure 6. Flash OFF HOOK (or ON HOOK & HFI o ), Fn 1. Fn = F1, ..., F4 2. The dialer will execute flash break time of 600 mS (F1), 100 mS (F2), 300 mS (F3), or 73 mS (F4) and all the pause time is 1.0 sec. before the next digit is dialed out. 3. Flash key can not be stored as a digit in memory. The flash key has the first priority among the keyboard functions. 4. The system will return to the initial state after the flash pause time is finished. 5. The flash function timing diagram is shown in Figure 7. HOLD OFF HOOK (or ON HOOK & HFI o ), H The hold function is switched on and off by a toggle switch. The keypad will be disabled when in hold mode. The function timing diagram is shown in Figure 3(a, b, c). ABSOLUTE MAXIMUM RATINGS PARAMETER DC Supply Voltage Input/Output Voltage SYMBOL VDD-VSS VIL VIH VOL VOH Power Dissipation Operation Temperature Storage Temperature PD TOPR TSTG RATING -0.3 to +7.0 VSS -0.3 VDD +0.3 VSS -0.3 VDD + 0.3 120 -20 to +70 -55 to +150 UNIT V V V V V mW C C Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device. -8- W91320N SERIES DC CHARACTERISTICS (VDD-VSS = 2.5V, FOSC. = 3.579545 MHz, TA = 25 C, All outputs unloaded) PARAMETER Operating Voltage Operating Current Standby Current SYM. VDD IOP ISB CONDITIONS Tone, Unloaded Pulse, Unloaded HKS = VSS, No load & No key entry HKS = VDD, VDD = 1.0V Row group, RL = 5 K Col/Row, VDD = 2.0 to 5.5V MIN. 2.0 - TYP. 0.4 0.2 - MAX. 5.5 0.6 0.4 15 UNIT V mA A Memory Retention Current DTMF Output Voltage Pre-emphasis DTMF Distortion DTMF Output DC Level DTMF Output Sink Current DP Output Sink Current T/P MUTE Output Sink Current H/P MUTE Output Drive/Sink Current HFO Drive/Sink Current Keypad Input Drive Current Keypad Input Sink Current HKS I/P Pull-High Resistor Keypad Resistance IMR VTO 130 1 1.0 0.2 0.5 0.5 0.5 0.5 0.5 0.5 30 200 - 150 2 -30 400 300 - 0.2 170 3 -23 3.0 5 A mVrm s dB dB V mA mA mA mA mA mA mA A A K K THD VTDC ITL IPL ITML IHPH IHPL IHFH IHFL IKD IKS RHK RK RL = 5 K, VDD = 2.0 to 5.5V RL = 5 K, VDD = 2.0 to 5.5V VTO = 0.5V VPO = 0.5V VTMO = 0.5V VHPL = 2.0V VHPL = 0.5V VHFH = 2.0V VHFL = 0.5V VI = 0.0V VI = 2.5V - -9- Publication Release Date: May 1997 Revision A2 W91320N SERIES AC CHARACTERISTICS (VDD-VSS = 2.5V, FOSC. = 3.579545 MHz, TA = 25 C, All outputs unloaded) PARAMETER Key-in Debounce Key Release Debounce Off-hook Delay First Key-in Delay Pre-digit-pause1 Pre-digit-pause2 Interdigit Pause (Auto Dialing) Make/Break Ratio Tone Output Duration Intertone Pause Flash Break Time SYMBOL TKID TKRD TOFD TFKD TPDP1 10 ppS TPDP2 20 ppS TIDP M:B TTD TITP TFB CONDITIONS Lock only Lock only Mode = VDD Mode = Floating Mode = VDD Mode = Floating 10 ppS 20 ppS Mode = VDD Mode = Floating Auto dialing Auto dialing F1 F2 F3 F4 MIN. - TYP. 20 20 300 300 40 33.3 20 16.7 800 500 40:60 33.3:66.7 93 93 600 100 300 73 1.0 3.6 2.0 2.2 600 MAX. - UNIT mS mS mS mS mS mS mS % mS mS mS Flash Pause Time Pause Time One-key Redial Break Time One-key Redial Pause Time Notes: TFP TP TRB TRP F1, F2, F3, F4 R/P1 R/P2 - S S S mS - 1. Crystal parameters suggested for proper operation are Rs < 100 , Lm = 96 mH, Cm = 0.02 pF, Cn = 5 pF, Cl = 18 pF, FOSC. = 3.579545 MHz 0.02%. 2. Crystal oscillator accuracy directly affects these times. - 10 - W91320N SERIES TIMING WAVEFORMS HKS KEY IN DP T/P MUTE H/P MUTE DTMF OSC. < 600 mS < 300 mS TKRD 4 2 MB 3 TKID 2 TKID TIDP MB TIDP TPDP TIDP TPDP TIDP Low OSCILLATION OSCILLATION Figure 1a. Normal Dialing Timing Diagram (Pulse Mode Without Lock Function) < 600 mS HKS < 300 mS TKRD 4 TKID 2 MB KEY IN DP T/P MUTE H/P MUTE DTMF OSC. 3 TOFD 2 TKID MB TIDP TPDP TIDP TPDP TIDP TFKD Low OSCILLATION OSCILLATION Figure 1b. Normal Dialing Timing Diagram (Pulse Mode with Lock Function) - 11 - Publication Release Date: May 1997 Revision A2 W91320N SERIES Timing Waveforms, continued < 600 mS HKS TKRD KEY IN DP T/P MUTE H/P MUTE DTMF OSC. Low R/P TKID MB MB T IDP TPDP TIDP TIDP OSCILLATION Figure 1c. Auto Dialing Timing Diagram (Pulse Mode Without Lock Function) < 600 mS HKS KEY IN DP T/P MUTE H/P MUTE DTMF OSC. Low 300 mS R/P T KID MB TOFD MB T IDP TPDP TIDP TIDP TFKD OSCILLATION Figure 1d. Auto Dialing Timing Diagram (Pulse Mode with Lock Function) - 12 - W91320N SERIES Timing Waveforms, continued < 600 mS HKS < 300 mS TKRD 4 2 5 2 TKID TKRD KEY IN DTMF 3 TKID TTD T/P MUTE H/P MUTE DP OSC. TITP TITP TITP TITP Low High OSCILLATION OSCILLATION OSCILLATION Figure 2a. Normal Dialing Timing Diagram (Tone Mode Without Lock Function) < 600 mS HKS < 300 mS TKRD 4 2 5 2 T KID KEY IN DTMF 3 TTD T/P MUTE TFKD H/P MUTE TOFD DP OSC. OSCILLATION TITP TITP TITP Low OSCILLATION Figure 2b. Normal Dialing Timing Diagram (Tone Mode with Lock Function) - 13 - Publication Release Date: May 1997 Revision A2 W91320N SERIES Timing Waveforms, continued < 600 mS HKS TKRD KEY IN DTMF TTD T/P MUTE H/P MUTE DP OSC. OSCILLATION R/P TKID TITP TITP Low Figure 2c. Auto Dialing Timing Diagram (Tone Mode Without Lock Function) < 600 mS HKS TKRD KEY IN DTMF TTD T/P MUTE 300 mS R/P TITP TITP TFKD Low H/P MUTE DP OSC. TOFD OSCILLATION Figure 2d. Auto Dialing Timing Diagram (Tone Mode with Lock Function) - 14 - W91320N SERIES Timing Waveforms, continued HKS HFI H KEY HFO T/P MUTE H/P MUTE CHIP ENBLE OFF HOOK ON HOOK High Low Figure 3a. Handfree and Hold Timing Diagram Note: The H KEY cannot be enabled when chip is disabled. HKS HFI H KEY HFO T/P MUTE H/P MUTE CHIP ENBLE OFF HOOK High Figure 3b. Handfree and Hold Timing Diagram Note: The HFI and H KEY inputs will toggle the HFO signal; as soon as either HFI or H KEY is activated, the HFO signal will go high and previous activate inputs will be ignored. - 15 - Publication Release Date: May 1997 Revision A2 W91320N SERIES Timing Waveforms, continued HKS HFI H KEY HFO ON HOOK T/P MUTE H/P MUTE CHIP ENBLE High Figure 3c. Handfree and Hold Timing Diagram Note: Changing the state of the HKS signal from high to low will initialize the HFO and H/P MUTE signals. HKS KEY IN DP < 600 mS R 300 mS R TKID TRB TRP TPDP TIDP MB TKID MB TIDP TOFD HFI HFO T/P MUTE H/P MUTE DTMF OSC. TFKD TPDP Low OSCILLATION Figure 4. One-key Redial Timing Diagram (Pulse Mode) - 16 - W91320N SERIES Timing Waveforms, continued < 600 mS HKS KEY IN DP T/P MUTE H/P MUTE TFKD Low 300 mS 2 R/P 3 TOFD TKID MB MB TIDP TPDP TP TPDP DTMF OSC. OSCILLATION OSCILLATION Figure 5. Pause Function Timing Diagram < 600 mS HKS KEY IN DP T/P MUTE TIDP H/P MUTE 300 mS TOFD 2 TKID MB */T 3 TPDP TP DTMF OSC. OSCILLATION OSCILLATION Figure 6. Pulse-to-tone Timing Diagram - 17 - Publication Release Date: May 1997 Revision A2 W91320N SERIES Timing Waveforms, continued HKS KEY IN DP F TKID Low F F 3 TFP T FB TKID T FB T KID HFI HFO T/P MUTE H/P MUTE DTMF TITP OSC. OSCILLATION Figure 7. Flash Timing Diagram - 18 - W91320N SERIES Headquarters No. 4, Creation Rd. III, Science-Based Industrial Park, Hsinchu, Taiwan TEL: 886-3-5770066 FAX: 886-3-5792697 http://www.winbond.com.tw/ Voice & Fax-on-demand: 886-2-7197006 Winbond Electronics (H.K.) Ltd. Rm. 803, World Trade Square, Tower II, 123 Hoi Bun Rd., Kwun Tong, Kowloon, Hong Kong TEL: 852-27516023 FAX: 852-27552064 Winbond Electronics North America Corp. Winbond Memory Lab. Winbond Microelectronics Corp. Winbond Systems Lab. 2730 Orchard Parkway, San Jose, CA 95134, U.S.A. TEL: 1-408-9436666 FAX: 1-408-9436668 Taipei Office 11F, No. 115, Sec. 3, Min-Sheng East Rd., Taipei, Taiwan TEL: 886-2-7190505 FAX: 886-2-7197502 Note: All data and specifications are subject to change without notice. - 19 - Publication Release Date: May 1997 Revision A2 |
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